Traditionally integrated circuits (IC) are created in layers. During the first portion of chip-making (or front-end-of-line), the individual components (transistors, capacitors, etc.) are fabricated on the wafer. These individual components are often arranged in standardized cells or standard circuit cells (e.g., a NAND gate, a NOR gate) that may be laid out and repeated in identical and predictable iterations, like Lego blocks.
In the back-end-of-line, these components are connected to each other to distribute signals, as well as power and ground. Generally, there is not enough room on the chip surface to create all those connections in a single layer, so chip manufacturers build vertical levels of interconnects. These layers are stacked one a top another (like a cake) and include various conducting (e.g., metal, semiconductor) layers, and non-conducting layers. While simpler integrated circuits may have just a few metal layers, complex ICs can have ten or more layers of wiring. These layers may, as needed, be connected to one another by vias which go vertically through layers, and provide an electrical signal a way or path to traverse from one layer to another.